OWC 3U2D42R816GB 16GB DDR4 3200 CL22 2Rx8 288-pin 1.2V Non-ECC UDIMM memory upgrade
- 16GB
- 288-Pin DDR4 Non-EC…
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OWC
16GB DDR4 2666MHz CL19 1.2V 288-pin UDIMM for HP Pavilion 590 series desktops
This 16GB DDR4 module is built specifically for HP Pavilion 590-p0000nc, 590-p0000ns, 590-p0002nb, 590-p0003nl and 590-p0004nl desktops. It provides a direct memory upgrade for owners of those systems who need more capacity for multitasking. The 288-pin UDIMM fits the standard desktop slots used by these models.
Operating at 1.2V, the module runs at standard DDR4 voltage without a heat spreader. The unbuffered, non-ECC design draws minimal power during typical desktop workloads. Passive cooling is sufficient for normal operation inside the Pavilion chassis. JEDEC compliance ensures stable electrical characteristics.
The single specification that determines suitability is the 16GB capacity per module. Buyers who need a different total amount or a higher density per slot should verify their board limits before ordering. This kit does not support ECC or registered memory configurations.
| Brand | OWC |
|---|---|
| Part Number | 2U6D42R816GB |
| Capacity | 16GB |
| Type | 288-Pin DDR4 Non-ECC UDIMM |
| Speed | DDR4 2666 (PC4 21300) |
| CAS Latency | CL19 |
| Voltage | 1.2V |
| ECC | No |
| Buffered/Registered | Unbuffered |
| Rank | 2Rx8 |
| Heat Spreader | No |
| Compatible System | HP Pavilion 590-p0000nc HP Pavilion 590-p0000ns HP Pavilion 590-p0002nb HP Pavilion 590-p0003nl HP Pavilion 590-p0004nl |
Other versions of this model
Same family, different memory, cooler or clock — compare before you commit.
Power off and unplug the PC, open the case, align the notch on the module with the slot key, press firmly until both side clips click shut, then verify the new 16GB appears in BIOS before closing the case.
No routine maintenance is required; the unbuffered non-ECC UDIMM has no heat spreader or moving parts, so it runs until a rare cell failure or a future capacity upgrade prompts replacement.
The CL19 latency at 2666MHz sets the throughput ceiling; under continuous load the memory controller hits timing constraints before thermal or voltage limits become a factor.
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