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Kingston Technology Corp.

Kingston Technology Corp. KSM56R46BD4-64MH 64 GB DDR5-5600 CL46 1.10 V ECC Registered 288-pin DIMM server RAM

SKU CH-0P73-JN135 MPN KSM56R46BD4-64MH

64 GB DDR5 server memory module running at 5600 MHz with CL46 latency, ECC error correction and registered buffering at 1.10 V

  • 64 GB capacity supports large server workloads
  • DDR5-5600 speed delivers 44800 MT/s bandwidth
  • CL46 latency at 1.10 V balances throughput and power
  • On-die ECC protects data integrity in critical tasks
  • Registered 288-pin DIMM fits standard server slots

Server DDR5 ECC Registered DIMM

This 64 GB DDR5 module runs at 5600 MHz with CL46 latency and operates at 1.10 V. It is built for servers and workstations that require registered memory with on-die error correction for data integrity.

Thermals and power in normal use

The module draws power at typical VDD and VDDQ of 1.1 V with VPP at 1.8 V and VDDSPD up to 2.0 V. No active cooling is included, so system airflow must handle the thermal load of registered DIMMs under sustained workloads.

Build integration and trade-offs

The 288-pin DIMM fits DDR5 slots that support registered ECC memory and dual-rank 64 GB density. It does not suit consumer platforms that lack registered memory support or that limit capacity per slot below this density.

商品特色

  • 64 GB capacity supports large server workloads
  • DDR5-5600 speed delivers 44800 MT/s bandwidth
  • CL46 latency at 1.10 V balances throughput and power
  • On-die ECC protects data integrity in critical tasks
  • Registered 288-pin DIMM fits standard server slots

商品規格

本商品目前尚未公佈規格。

商品問答

How do I install the 288-pin DDR5 DIMM and which notch alignment do people miss?

Align the single off-centre notch on the module with the key in the server's DDR5 slot, press straight down until both retention clips click, and confirm the 1.10 V VDD and 1.8 V VPP rails are live in the BIOS before booting.

What maintenance or replacement will the 64 GB dual-rank module need over its service life?

No scheduled maintenance is required; the on-die ECC corrects single-bit errors transparently, and the module should only be replaced if the system logs uncorrectable memory errors or fails POST memory training.

What limit appears first when the CL46 5600 MHz memory runs sustained workloads?

The CAS latency of 46 cycles at 5600 MHz sets the minimum access delay, so sustained throughput is bound by tCL timing before thermal or voltage limits are reached.

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