OWC 128GB DDR5 5600 CL46 4Rx4 288-pin 1.1V ECC RDIMM 5R6D54R4128G
- 128GB
- 288-Pin DDR5 ECC RD…
OWC
A single 128GB DDR5 5600 CL46 ECC registered RDIMM for compatible Supermicro SuperServer systems
Capacity 128GB
This OWC 128GB DDR5 5600 CL46 ECC registered DIMM is built for Supermicro SuperServer platforms including the SYS-421GE-TNHR2-LCC SYS-421GE-TNRT SYS-421GE-TNRT3 and SYS-421GU-TNXR. It targets administrators expanding memory capacity in workstations NAS systems and network switches that require registered error-correcting modules. The single-module design simplifies slot population in dense server chassis.
Operating at 1.1V the module follows JEDEC DDR5 voltage standards for lower power consumption per gigabyte compared with previous generations. No heat spreader is fitted so airflow across the bare PCB handles thermal dissipation in typical server environments. Registered buffering reduces electrical load on the memory controller contributing to stable operation under sustained workloads.
The 288-pin RDIMM form factor with 4Rx4 organisation plugs directly into compatible Supermicro DDR5 slots without adapters. JEDEC and RoHS compliance ensures the module meets industry specifications for warranty-safe upgrades. ECC registered architecture prevents mixing with unbuffered or load-reduced DIMMs so identical modules must populate each channel for correct operation.
| Brand | OWC |
|---|---|
| Part Number | 5R6D54R4128G |
| Capacity | 128GB |
| Type | 288-Pin DDR5 ECC RDIMM |
| Speed | DDR5 5600 (PC5 44800) |
| CAS Latency | 46 |
| Voltage | 1.1V |
| ECC | Yes |
| Buffered/Registered | Registered |
| Rank | 4Rx4 |
| Heat Spreader | No |
| Compatible System | Supermicro SuperServer SYS-421GE-TNHR2-LCC Supermicro SuperServer SYS-421GE-TNRT Supermicro SuperServer SYS-421GE-TNRT3 Supermicro SuperServer SYS-421GU-TNXR |
其他版本
同系列產品,記憶體、散熱器或時脈不同 — 下單前請先比較。
Power down, open the chassis, align the keyed 288-pin edge connector with the DDR5 slot notch, press firmly until both ejector clips click shut, then populate slots per the motherboard manual channel sequence for registered memory.
No scheduled maintenance is required; ECC corrects single-bit errors on the fly, but if correctable-error counters in the BMC log climb steadily, plan to replace the DIMM before uncorrectable faults appear.
The registered buffer and on-die ECC add latency, so memory-controller throughput saturation typically arrives before thermal throttling at the standard 1.1 V operating point.
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