RIMLANCE 128GB (2×64GB) DDR4 3200 ECC Registered RDIMM Server RAM
- 128GB (2 x 64GB)
- 288-Pin DDR4 SDRAM
RIMLANCE
Eight 32 GB DDR4 3200 ECC registered DIMMs deliver 256 GB of server memory with CL22 latency and 1.2 V operation
Capacity 256GB (8 x 32GB)
This 256 GB kit provides eight 32 GB DDR4 3200 registered DIMMs with ECC for Dell PowerEdge XR11 rack servers. It targets administrators who need maximum memory capacity for virtualization, databases or cloud workloads on that platform.
Each module uses a 288-pin DDR4 interface, 2Rx4 organisation and registered buffering to maintain signal integrity across all eight slots. The 1.2 V operating voltage matches standard DDR4 server requirements and the design fits the XR11 memory architecture without modification.
RIMLANCE backs the kit with a lifetime replacement warranty and access to experienced IT support staff. Modules are tested with Samsung, Micron or Hynix DRAM chips to verify stability before shipment, reducing the chance of early failures in production.
| Brand | RIMLANCE |
|---|---|
| Series | Dell PowerEdge XR11 Rack Server Series Server Memory Module |
| Model | Dell PowerEdge Compatible DDR4 3200MHz ECC RDIMM |
| Part Number | RRD25600D4C8K256 |
| Capacity | 256GB (8 x 32GB) |
| Type | 288-Pin DDR4 SDRAM |
| Speed | DDR4 3200 (PC4 25600) |
| CAS Latency | CL22 |
| Voltage | 1.20V |
| ECC | Yes |
| Buffered/Registered | Registered |
| Rank | 2Rx4 |
| Chipset | Major OEM Samsung, Micron, Hynix Chipset |
| Heat Spreader | No |
| Features | Compatible and Optimized for Dell PowerEdge XR11 |
其他版本
同系列產品,記憶體、散熱器或時脈不同 — 下單前請先比較。
The kit is rated DDR4-3200 (PC4-25600). The XR11 memory controller determines the final speed; it may run at 3200 MT/s or step down to a supported JEDEC frequency depending on CPU and DIMM population.
Each module is a standard 288-pin DDR4 RDIMM with no heat spreader. The XR11 uses regular DDR4 slots, so the 8×32 GB kit fits provided the server has eight available DIMM sockets.
Follow the XR11 service manual: populate channels evenly across both CPUs, observe the per-channel DIMM order (usually slot 1 then slot 2), and seat each RDIMM until the ejector tabs click. Skipping the channel-balance rule is the most common error.
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